verilog移位操作符

verilog移位操作符浅析Verilog移位寄存器(逻辑移位、算术移位、循环移位)一、逻辑移位寄存器题目Build a 4-bit shift register (right shift), with asynchronous reset, synchronous load, and enable.arese

浅析Verilog移位寄存器(逻辑移位、算术移位、循环移位)   一、逻辑移位寄存器   题目   Build a 4-bit shift register (right shift), with asynchronous reset, synchronous load, and enable.areset: Resets shift register to zero.load: Loads shift register with data[3:0] instead of shifting.ena: Shift right (q[3] becomes zero, q[0] is shifted out and disappears).q: The contents of the shift register.   If both the load and ena inputs are asserted (1), the load input has higher priority.   (移位就是做乘法除法,左移为乘法,右移为除法。)   二、算术移位寄存器   题目   Build a 64-bit arithmetic shift register, with synchronous load. The shifter can shift both left and right, and by 1 or 8 bit positions, selected by amount.   There is no difference between logical and arithmetic left shifts.load: Loads shift register with data[63:0] instead of shifting.ena: Chooses whether to shift.amount: Chooses which direction and how much to shift.2’b00: shift left by 1 bit.2’b01: shift left by 8 bits.2’b10: shift right by 1 bit.2’b11: shift right by 8 bits.q: The contents of the shifter.   算术移位和逻辑移位的区别就在于符号问题,逻辑移位无论左移还是右移,都直接补0,因为只是逻辑移位,简单来说就是为了移位而移位,不需要考虑符号的问题;而算术移位,左移是直接补0(与逻辑移位相同),右移的话补符号位。左移补0是因为高位溢出不用理,低位变成高位,所以低位补0;右移补符号位是因为要考虑正负号问题,最高位为符号位,如果符号位为0,正数右移补0,如果符号位为1,负数右移补1。   三、循环移位寄存器   题目   Build a 100-bit left/right rotator, with synchronous load and left/right enable. A rotator shifts-in the shifted-out bit from the other end of the register, unlike a shifter that discards the shifted-out bit and shifts in a zero. If enabled, a rotator rotates the bits around and does not modify/discard them.load: Loads shift register with data[99:0] instead of rotating.ena[1:0]: Chooses whether and which direction to rotate.2’b01 rotates right by one bit2’b10 rotates left by one bit2’b00 and 2’b11 do not rotate.q: The contents of the rotator.   (时序逻辑不写完整的if…else…,是不会产生锁存器的)   本文题目来自HDLBits网址:https://hdlbits.01xz.net/wiki/Main_Page

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